Gee.External.Capstone

ARM64 Address Translation (AT) Operation.

Indicates an invalid, or an uninitialized, AT operation.

ARM64 Barrier Operation.

Represents barrier operations supported by the DMB, DSB, and ISB instructions.

Indicates an invalid, or an uninitialized, barrier operation.

ARM64 Condition Code.

Indicates an invalid, or an uninitialized, condition code.

ARM64 Data Cache (DC) Operation.

Indicates an invalid, or an uninitialized, DC operation.

ARM64 Disassemble Mode.

Indicates binary code should be disassembled in 32-bit ARM mode.

Indicates binary code should be disassembled in big-endian mode.

Indicates binary code should be disassembled in little-endian mode.

ARM64 Extend Operation.

Indicates an invalid, or an uninitialized, extend operation.

ARM64 Instruction Cache (IC) Operation.

Indicates an invalid, or an uninitialized, IC operation.

ARM64 Instruction.

Create an ARM64 Instruction.

A disassembler. An instruction handle. An ARM64 instruction.

Create an ARM64 Instruction.

A builder to initialize the object with.

ARM64 Instruction Builder.

Create an ARM64 Instruction.

An ARM64 instruction.

Create Instruction's Details.

A disassembler. An instruction handle. The instruction's details.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create Instruction's Unique Identifier.

An instruction's unique identifier. The instruction's unique identifier.

ARM64 Instruction Detail.

Get Condition Code.

Get Instruction's Operands.

Get Update Flags Flag.

Get Write Back Flag.

Create an ARM64 Instruction Detail.

A disassembler. An instruction handle. An ARM64 instruction detail.

Create an ARM64 Instruction Detail.

A builder to initialize the object with.

ARM64 Instruction Detail Builder.

Get and Set Condition Code.

Get and Set Instruction's Operands.

Get and Set Update Flags Flag.

Get and Set Write Back Flag.

Build an Instruction Detail.

A disassembler. An instruction handle.

Create an ARM64 Instruction Detail.

An ARM64 instruction detail.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create an Instruction Group.

A disassembler. An instruction group's unique identifier. An ARM64 instruction group.

Create a Register.

A disassembler. A register's unique identifier. An ARM64 register.

ARM64 Instruction Group.

Create an ARM64 Instruction Group.

A disassembler. The instruction group's unique identifier. An ARM64 instruction group.

Create an ARM64 Instruction Group.

ARM64 Instruction Group Unique Identifier.

Indicates an invalid, or an uninitialized, instruction group.

ARM64 Instruction Unique Identifier.

Indicates an invalid, or an uninitialized, instruction.

ARM64 Memory Operand Value.

Get Base Register.

Get Displacement Value.

Get Index Register.

Create an ARM64 Memory Operand Value.

A disassembler. A native ARM64 memory operand value.

ARM64 MRS System Register.

Indicates an invalid, or an uninitialized, system register.

ARM64 MSR System Register.

Indicates an invalid, or an uninitialized, MSR register.

ARM64 Operand.

Operand's Access Type.

Address Translation (AT) Operation.

Barrier Operation.

Data Cache (DC) Operation.

Floating Point Value.

Instruction Cache (IC) Operation.

Immediate Value.

Memory Value.

MRS System Register Value.

MSR System Register Value.

Prefetch Operation.

Processor State (PSTATE) Field.

Register Value.

Shift Value.

Translation Lookaside Buffer (TLBI) Operation.

Get Operand's Access Type.

Represents the operand's access type if, and only if, Diet Mode is disabled. To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled.

Get Address Translation (AT) Operation.

Represents the operand's Address Translation (AT) operation if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Barrier Operation.

Represents the operand's barrier operation if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Data Cache (DC) Operation.

Represents the operand's Data Cache (DC) operation if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Extend Operation.

Get Floating Point Value.

Represents the operand's floating point value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Instruction Cache (IC) Operation.

Represents the operand's Instruction Cache (IC) operation if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Immediate Value.

Represents the operand's immediate value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Determine if Diet Mode is Enabled.

Indicates if Diet Mode is enabled. A boolean true indicates it is enabled. A boolean false otherwise.

Get Memory Value.

Represents the operand's memory value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get MRS System Register Value.

Represents the operand's MRS system register value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get MSR System Register Value.

Represents the operand's MRS system register value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Prefetch Operation.

Represents the operand's prefetch operation if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Processor State (PSTATE) Field.

Represents the operand's processor state (PSTATE) field if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Register Value.

Represents the operand's register value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Shift Operation.

Get Shift Value.

Represents the operand's shift value if, and only if, the operand's shift operation is not . To determine the operand's shift operation, call . Thrown if the shift operation is .

Get Translation Lookaside Buffer (TLBI) Operation.

Represents the operand's Translation Lookaside Buffer (TLBI) operation if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Operand's Type.

Get Vector Arrangement Specifier.

Get Vector Element Size Specifier.

Get Vector Index.

Create ARM64 Operands.

A disassembler. An instruction's unique identifier. A native ARM64 instruction detail. An array of ARM64 operands.

Create an ARM64 Operand.

A disassembler. An instruction's unique identifier. A native ARM64 operand.

ARM64 Operand Type.

Indicates an invalid, or an uninitialized, operand type.

Indicates a register operand.

Indicates an immediate operand.

Indicates a memory operand.

Indicates a floating point operand.

Indicates a CImmediate operand.

Indicates a MRS system register operand.

Indicates a MSR system register operand.

Indicates a Processor State (PSTATE) field operand.

Indicates a system operation operand.

Indicates a prefetch operation operand.

Indicates a barrier operation operand.

Indicates an Address Translation (AT) operation.

Indicates a Data Cache (DC) operation.

Indicates an Instruction Cache (IC) operation.

Indicates a Translation Lookaside Buffer (TLBI) operation.

ARM64 Prefetch Operation.

Indicates an invalid, or an uninitialized, prefetch operation.

ARM64 Processor State (PSTATE) Field.

Indicates an invalid, or an uninitialized, PSTATE field.

ARM64 Register.

Create an ARM64 Register.

A disassembler. The register's unique identifier. An ARM64 register. Thrown if the disassembler is disposed.

Create an ARM64 Register.

The register's unique identifier. The register's name.

ARM64 Register Unique Identifier.

Indicates an invalid, or an uninitialized, register.

ARM64 Shift Operation.

Indicates an invalid, or an uninitialized, shift operation.

ARM64 Translation Lookaside Buffer (TLBI) Operation.

Indicates an invalid, or an uninitialized, TLBI operation.

ARM64 Vector Arrangement Specifier.

Indicates an invalid, or an uninitialized, vector arrangement specifier.

ARM64 Vector Element Size Specifier.

Indicates an invalid, or an uninitialized, vector element size specifier.

Capstone ARM64 Disassembler.

Create a Capstone ARM Disassembler.

The hardware mode for the disassembler to use. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create an Instruction.

An instruction handle. An ARM64 instruction.

Native ARM64 Instruction Detail.

Condition Code.

Update Flags Flag.

Write Back Flag.

Instruction's Operand Count.

Instruction's Operands.

Native ARM64 Memory Operand Value.

Base Register.

Index Register.

Displacement Value.

Native ARM64 Operand.

Vector Index.

Vector Arrangement Specifier.

Vector Element Size Specifier.

Shift.

Extend Operation.

Operand's Type.

Operand's Value.

Operand's Access Type.

Native ARM64 Operand Shift.

Shift Operation.

Shift Value.

Native ARM64 Operand Value.

Register.

Immediate Value.

Floating Point Value.

Memory Value.

Processor State (PSTATE) Field.

System Operation.

Prefetch Operation.

Barrier Operation.

ARM Condition Code.

Indicates an invalid, or an uninitialized, condition code.

ARM CPS Flag.

Indicates an invalid, or an uninitialized, CPS flag.

ARM CPS Mode.

Indicates an invalid, or an uninitialized, CPS mode.

ARM Disassemble Mode.

Indicates binary code should be disassembled in 32-bit ARM mode.

Indicates binary code should be disassembled in big-endian mode.

Indicates binary code should be disassembled in little-endian mode.

Indicates binary code should be disassembled with support for the ARM Cortex-M processor cores.

Indicates binary code should be disassembled with support for the ARM Thumb and ARM Thumb-2 instruction sets.

Indicates binary code should be disassembled with support for the ARMv8 instruction set.

ARM Instruction.

Create an ARM Instruction.

A disassembler. An instruction handle. An ARM instruction.

Create an ARM Instruction.

A builder to initialize the object with.

ARM Instruction Builder.

Create an ARM Instruction.

An ARM instruction.

Create Instruction's Details.

A disassembler. An instruction handle. The instruction's details.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create Instruction's Unique Identifier.

An instruction's unique identifier. The instruction's unique identifier.

ARM Instruction Detail.

Get Condition Code.

Get CPS Flag.

Get CPS Mode.

Get User Mode Flag.

Get Memory Barrier Operation.

Get Instruction's Operands.

Get Update Flags Flag.

Get Vector Data Type.

Get Vector Size.

Get Write Back Flag.

Create an ARM Instruction Detail.

A disassembler. An instruction handle. An ARM instruction detail.

Create an ARM Instruction Detail.

A builder to initialize the object with.

ARM Instruction Detail Builder.

Get and Set Condition Code.

Get and Set CPS Flag.

Get and Set CPS Mode.

Get and Set User Mode Flag.

Get and Set Memory Barrier Operation.

Get and Set Instruction's Operands.

Get and Set Update Flags Flag.

Get and Set Vector Data Type.

Get and Set Vector Size.

Get and Set Write Back Flag.

Build an Instruction Detail.

A disassembler. An instruction handle.

Create an ARM Instruction Detail.

An ARM instruction detail.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create an Instruction Group.

A disassembler. An instruction group's unique identifier. An ARM instruction group.

Create a Register.

A disassembler. A register's unique identifier. An ARM register.

ARM Instruction Group.

Create an ARM Instruction Group.

A disassembler. The instruction group's unique identifier. An ARM instruction group.

Create an ARM Instruction Group.

ARM Instruction Group Unique Identifier.

Indicates an invalid, or an uninitialized, instruction group.

ARM Instruction Unique Identifier.

Indicates an invalid, or an uninitialized, instruction.

ARM Memory Barrier Operation.

Indicates an invalid, or an uninitialized, memory barrier operation.

ARM Memory Operand Value.

Get Base Register.

Get Displacement Value.

Get Index Register.

Get Index Register's Left Shift Value.

Get Index Register's Scale.

Create an ARM Memory Operand Value.

A disassembler. A native ARM memory operand value.

ARM Operand.

Operand's Access Type.

Floating Point Value.

Immediate Value.

Memory Value.

Register Value.

SETEND Operation.

Shift Register.

Shift Value.

System Register Value.

Get Operand's Access Type.

Represents the operand's access type if, and only if, Diet Mode is disabled. To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled.

Get Floating Point Value.

Represents the operand's floating point value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Immediate Value.

Represents the operand's immediate value if the operand's type is , , or . To determine the operand's type, call . Thrown if the operand's type is not , , or .

Determine if Diet Mode is Enabled.

Indicates if Diet Mode is enabled. A boolean true indicates it is enabled. A boolean false otherwise.

Get Subtracted Flag.

Get Memory Value.

Represents the operand's memory value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Neon Lane Value.

Get Register Value.

Represents the operand's register value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get SETEND Operation.

Represents the operand's SETEND operation if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Shift Operation.

Get Shift Register.

Conveniently represents the operand's shift register if the operand's shift operation is not and greater than or equal to . To determine the operand's shift operation, call . Thrown if the shift operation is equal to , or if the shift operation is less than .

Get Shift Value.

Represents the operand's shift value if, and only if, the operand's shift operation is not . To determine the operand's shift operation, call . Thrown if the shift operation is .

Get System Register.

Represents the operand's system register if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Operand's Type.

Get Vector Index.

Create ARM Operands.

A disassembler. A native ARM instruction detail. An array of ARM operands.

Create an ARM Operand.

A disassembler. A native ARM operand.

ARM Operand Type.

Indicates an invalid, or an uninitialized, operand type.

Indicates a register operand.

Indicates an immediate operand.

Indicates a memory operand.

Indicates a floating point operand.

Indicates a CImmediate operand.

Indicates a PImmediate operand.

Indicates a SETEND operation operand.

Indicates a system register operand.

ARM Register.

Create an ARM Register.

A disassembler. The register's unique identifier. An ARM register. Thrown if the disassembler is disposed.

Create an ARM Register.

The register's unique identifier. The register's name.

ARM Register Unique Identifier.

Indicates an invalid, or an uninitialized, register.

ARM SETEND Operation.

Indicates an invalid, or an uninitialized, SETEND operation.

ARM Shift Operation.

Indicates an invalid, or an uninitialized, shift operation.

ARM System Register.

Indicates an invalid, or an uninitialized, system register.

ARM Vector Data Type.

Indicates an invalid, or an uninitialized, vector data type.

Capstone ARM Disassembler.

Create a Capstone ARM Disassembler.

The hardware mode for the disassembler to use. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create an Instruction.

An instruction handle. An ARM instruction.

Native ARM Instruction Detail.

User Mode Flag.

Vector Size.

Vector Data Type.

CPS Mode.

CPS Flag.

Condition Code.

Update Flags Flag.

Write Back Flag.

Memory Barrier Operation Operation.

Instruction's Operands' Count.

Instruction's Operands.

Native ARM Memory Operand Value.

Base Register.

Index Register.

Index Register's Scale.

Displacement Value.

Index Register's Left Shift Value.

Native ARM Operand.

Vector Index.

Shift.

Operand's Type.

Operand's Value.

Operand's Subtracted Flag.

Operand's Access Type.

Neon Lane Value.

Native ARM Operand Shift.

Shift Operation.

Shift Value.

Native ARM Operand Value.

Register Value.

Immediate Value.

Floating Point Value.

Memory Value.

SETEND Operation.

Capstone Disassembler.

Determine if the ARM64 Architecture is Supported.

Indicates if the ARM64 architecture is supported. A boolean true indicates it is supported. A boolean false otherwise.

Determine if the ARM Architecture is Supported.

Indicates if the ARM architecture is supported. A boolean true indicates it is supported. A boolean false otherwise.

Determine if Diet Mode is Enabled.

Indicates if Diet Mode is enabled. A boolean true indicates it is enabled. A boolean false otherwise.

Determine if the Ethereum EVM Architecture is Supported.

Indicates if the Ethereum EVM architecture is supported. A boolean true indicates it is supported. A boolean false otherwise.

Determine if the M680X Architecture is Supported.

Indicates if the M680X architecture is supported. A boolean true indicates it is supported. A boolean false otherwise.

Determine if the M68K Architecture is Supported.

Indicates if the M68K architecture is supported. A boolean true indicates it is supported. A boolean false otherwise.

Determine if the MIPS Architecture is Supported.

Indicates if the MIPS architecture is supported. A boolean true indicates it is supported. A boolean false otherwise.

Determine if the PowerPC Architecture is Supported.

Indicates if the PowerPC architecture is supported. A boolean true indicates it is supported. A boolean false otherwise.

Determine if the SPARC Architecture is Supported.

Indicates if the SPARC architecture is supported. A boolean true indicates it is supported. A boolean false otherwise.

Determine if the SystemZ Architecture is Supported.

Indicates if the SystemZ architecture is supported. A boolean true indicates it is supported. A boolean false otherwise.

Determine if the TMS320C64X Architecture is Supported.

Indicates if the TMS320C64X architecture is supported. A boolean true indicates it is supported. A boolean false otherwise.

Determine if X86 Reduce Mode is Enabled.

Indicates if X86 Reduce Mode is enabled. A boolean true indicates it is enabled. A boolean false otherwise.

Determine if the X86 Architecture is Supported.

Indicates if the X86 architecture is supported. A boolean true indicates it is supported. A boolean false otherwise.

Determine if the XCore Architecture is Supported.

Indicates if the XCore architecture is supported. A boolean true indicates it is supported. A boolean false otherwise.

Get Capstone Library's Version.

The Capstone library's version.

Get Disassemble Architecture.

Represents the disassembler's hardware architecture.

Enable or Disable Instruction Details.

Thrown if the instruction details option could not be set. Thrown if the disassembler is disposed.

Enable or Disable Skip Data Mode.

Thrown if the Skip Data Mode option could not be set. Thrown if the disassembler is disposed.

Get Disassembler's Handle.

Represents the disassembler's native handle.

Get Native Disassemble Mode.

Represents the disassembler's native hardware mode.

Get and Set Skip Data Instruction Mnemonic.

Thrown if the value is a null reference. Thrown if the disassembler is disposed.

Create an ARM64 Disassembler.

The hardware mode for the disassembler to use. An ARM64 disassembler. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create an ARM Disassembler.

The hardware mode for the disassembler to use. An ARM disassembler. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create an M68K Disassembler.

The hardware mode for the disassembler to use. An M68K disassembler. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create a MIPS Disassembler.

The hardware mode for the disassembler to use. A MIPS disassembler. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create a PowerPC Disassembler.

The hardware mode for the disassembler to use. A PowerPC disassembler. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create an X86 Disassembler.

The hardware mode for the disassembler to use. An X86 disassembler. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create an XCore Disassembler.

The hardware mode for the disassembler to use. An XCore disassembler. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Throw an Exception if Diet Mode is Enabled.

Thrown if Diet Mode is enabled.

Throw an Exception if a Value is a Null Reference.

The type of the value. The name of the parameter the value was passed as an argument to. The value. Thrown if the value is a null reference.

Dispose Object.

Capstone Disassembler.

The type of the hardware mode for the disassembler to use. The type of the disassembled instructions. The type of the instructions' details. The type of the instructions' architecture specific instruction groups. The type of the instructions' architecture specific instruction group unique identifiers. The type of the instructions' unique identifiers. The type of the instructions' architecture specific registers. The type of the instructions' architecture specific register unique identifiers.

Disassemble Architecture.

Disassemble Mode.

Disassemble Syntax.

Enable Instruction Details Flag.

Enable Skip Data Mode Flag.

Disassembler's Handle.

Native Disassemble Mode.

Skip Data Callback.

Skip Data Instruction Mnemonic.

Get Disassemble Architecture.

Represents the disassembler's hardware architecture.

Get and Set Disassemble Mode.

Represents the disassembler's hardware mode. Thrown if the disassemble mode option could not be set. Thrown if the disassembler handle is disposed.

Get and Set Disassemble Syntax.

Thrown if the disassemble syntax option could not be set. Thrown if the disassembler is disposed.

Enable or Disable Instruction Details.

Thrown if the instruction details option could not be set. Thrown if the disassembler is disposed.

Enable or Disable Skip Data Mode.

Thrown if the Skip Data Mode option could not be set. Thrown if the disassembler is disposed.

Get Disassembler's Handle.

Represents the disassembler's native handle.

Get Native Disassemble Mode.

Represents the disassembler's native hardware mode.

Get and Set Skip Data Callback.

Thrown if the disassembler is disposed.

Get and Set Skip Data Instruction Mnemonic.

Thrown if the value is a null reference. Thrown if the disassembler is disposed.

Create a Disassembler.

The hardware architecture for the disassembler to use. The hardware mode for the disassembler to use. Thrown if a disassembler could not be created. Thrown if the disassemble architecture is invalid, or if the disassemble mode is invalid or unsupported by the disassemble architecture. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create an Instruction.

An instruction handle. An instruction.

Disassemble Binary Code.

An array of bytes representing the binary code to disassemble. An array of disassembled instructions. Thrown if the binary code array is a null reference. Thrown if the disassembler is disposed.

Disassemble Binary Code.

An array of bytes representing the binary code to disassemble. The address of the first instruction in the binary code array. An array of disassembled instructions. Thrown if the binary code array is a null reference. Thrown if the disassembler is disposed.

Disassemble Binary Code.

An array of bytes representing the binary code to disassemble. The address of the first instruction in the binary code array. The maximum number of instructions to disassemble. An array of disassembled instructions. Thrown if the binary code array is a null reference. Thrown if the disassembler is disposed.

Dispose Object.

Get an Instruction Group's Name.

An instruction group's unique identifier. The instruction group's name. Thrown if the instruction group's unique identifier is invalid. Thrown if the disassembler is disposed. Thrown if Diet Mode is enabled.

Get a Register's Name.

A register's unique identifier. The register's name. Thrown if the register's unique identifier is invalid. Thrown if the disassembler is disposed. Thrown if diet mode is enabled.

Disassemble Binary Code Iteratively.

An array of bytes representing the binary code to disassemble. A deferred collection of disassembled instructions. Thrown if the binary code array is a null reference. Thrown if the disassembler is disposed.

Disassemble Binary Code Iteratively.

An array of bytes representing the binary code to disassemble. The address of the first instruction in the binary code array. A deferred collection of disassembled instructions. Thrown if the binary code array is a null reference. Thrown if the disassembler is disposed.

Reset an Instruction's Mnemonic.

An instruction unique identifier. Thrown if the instruction mnemonic could not be reset. Thrown if the disassembler is disposed.

Set an Instruction's Mnemonic.

An instruction's unique identifier. A mnemonic to associate with the instruction. Thrown if the instruction mnemonic could not be set. Thrown if the instruction mnemonic is a null reference. Thrown if the disassembler is disposed.

Throw an Exception if Disassembler is Disposed.

Thrown if the disassembler is disposed.

Capstone Exception.

Create a Capstone Exception.

A detail message describing the reason the exception was thrown.

Create a Capstone Exception.

A detail message describing the reason the exception was thrown. An exception that is the cause of this exception being thrown.

Disassemble Architecture.

ARM Architecture.

ARM64 Architecture.

MIPS Architecture.

X86 Architecture.

PowerPC Architecture.

Sparc Architecture.

SystemZ Architecture.

XCore Architecture.

M68K Architecture.

TMS320C64x Architecture.

680X Architecture.

Ethereum EVM Architecture.

Disassemble Syntax.

Indicates a disassembler should use AT&T syntax for generated assembly code.

Indicates a disassembler should use Intel syntax for generated assembly code.

Indicates a disassembler should use MASM syntax for generated assembly code.

Disassembled Instruction.

This type. The type of the instruction's details. The type of the hardware mode the instruction was disassembled for. The type of the instruction's architecture specific instruction groups. The type of the instruction's architecture specific instruction group unique identifiers. The type of the instruction's unique identifier. The type of the instruction's architecture specific registers. The type of the instruction's architecture specific register unique identifiers.

Instruction's Details.

Instruction's Mnemonic.

Instruction's Operand Text.

Get Instruction's Address (EIP).

Get Instruction's Machine Bytes.

Get Instruction's Details.

Represents the instruction's details if, and only if, the instruction was disassembled with details. A null reference otherwise. To determine if the instruction was disassembled with details, call . Thrown if the instruction was disassembled with no details.

Get Instruction's Disassemble Architecture.

Represents the hardware architecture the instruction was disassembled for.

Get Instruction's Disassemble Mode.

Represents the hardware mode the instruction was disassembled for.

Determine if Instruction Has Details.

Indicates if the instruction was disassembled with details. A boolean true indicates the instruction was disassembled with details. A boolean false otherwise. If the instruction was disassembled without details, it is either because instruction details were disabled on the disassembler or instruction details and Skip Data Mode were enabled on the disassembler and the instruction is a skipped data instruction. To determine if the instruction is a skipped data instruction, call .

Get Instruction's Unique Identifier.

Determine if Diet Mode is Enabled.

Indicates if Diet Mode is enabled. A boolean true indicates it is enabled. A boolean false otherwise.

Determine if Instruction is Skipped Data.

Indicates if the instruction is a skipped data instruction. A boolean true indicates the instruction is a skipped data instruction. A boolean false otherwise.

Get Instruction's Mnemonic.

Represents the instruction's mnemonic if, and only if, Diet Mode is disabled. To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled.

Get Instruction's Operand Text.

Represents the instruction's operand text if, and only if, Diet Mode is disabled. To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled.

Create a Disassembled Instruction.

A builder to initialize the object with.

Disassembled Instruction Builder.

The type of the instruction's details. The type of the hardware mode the instruction was disassembled for. The type of the instruction's architecture specific instruction groups. The type of the instruction's architecture specific instruction group unique identifiers. The type of the instruction. The type of the instruction's unique identifier. The type of the instruction's architecture specific registers. The type of the instruction's architecture specific register unique identifiers.

Get and Set Instruction's Address (EIP).

Get and Set Instruction's Machine Bytes.

Get and Set Instruction's Details.

Get and Set Instruction's Disassemble Architecture.

Get and Set Instruction's Disassemble Mode.

Get and Set Instruction's Unique Identifier.

Determine if Instruction is Skipped Data.

Get and Set Instruction's Mnemonic.

Get and Set Instruction's Operand Text.

Create an Instruction Builder.

Build an Instruction.

A disassembler. An instruction handle.

Create Instruction's Details.

A disassembler. An instruction handle. The instruction's details.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create Instruction's Unique Identifier.

An instruction's unique identifier. The instruction's unique identifier.

Disassembled Instruction Detail.

This type. The type of the hardware mode the instruction was disassembled for. The type of the instruction's architecture specific instruction groups. The type of the instruction's architecture specific instruction group unique identifiers. The type of the instruction. The type of the instruction's unique identifier. The type of the instruction's architecture specific registers. The type of the instruction's architecture specific register unique identifiers.

All Read Registers.

All Written Registers.

Explicitly Read Registers.

Explicitly Written Registers.

Instruction's Groups.

Implicitly Read Registers.

Implicitly Written Registers.

Get All Read Registers.

Represents all the registers read by the instruction, both explicitly and implicitly, if Diet Mode is disabled and the hardware architecture the instruction was disassembled for supports the operation. This is effectively equivalent to the union of and . To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled, or if the hardware architecture the instruction was disassembled for does not support the operation.

Get All Written Registers.

Represents all the registers written by the instruction, both explicitly and implicitly, if Diet Mode is disabled and the hardware architecture the instruction was disassembled for supports the operation. This is effectively equivalent to the union of and . To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled, or if the hardware architecture the instruction was disassembled for does not support the operation.

Get Instruction's Disassemble Architecture.

Represents the hardware architecture the instruction was disassembled for.

Get Instruction's Disassemble Mode.

Represents the hardware mode the instruction was disassembled for.

Get Explicitly Read Registers.

Represents the registers explicitly read by the instruction, if Diet Mode is disabled and the hardware architecture the instruction was disassembled for supports the operation. To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled, or if the hardware architecture the instruction was disassembled for does not support the operation.

Get Explicitly Written Registers.

Represents the registers explicitly written by the instruction, if Diet Mode is disabled and the hardware architecture the instruction was disassembled for supports the operation. To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled, or if the hardware architecture the instruction was disassembled for does not support the operation.

Get Instruction's Groups.

Represents the instruction groups the instruction belongs to if, and only if, Diet Mode is disabled. To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled.

Get Implicitly Read Registers.

Represents the registers implicitly read by the instruction, if Diet Mode is disabled and the hardware architecture the instruction was disassembled for supports the operation. To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled.

Get Implicitly Written Registers.

Represents the registers implicitly written by the instruction, if Diet Mode is disabled and the hardware architecture the instruction was disassembled for supports the operation. To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled.

Determine if Diet Mode is Enabled.

Indicates if Diet Mode is enabled. A boolean true indicates it is enabled. A boolean false otherwise.

Create a Disassembled Instruction Detail.

A builder to initialize the object with.

Determine if Instruction Belongs to an Instruction Group.

An instruction group's name. A boolean true if the instruction belongs to the instruction group. A boolean false otherwise. Thrown if Diet Mode is enabled.

Determine if Instruction Belongs to an Instruction Group.

An instruction group's unique identifier. A boolean true if the instruction belongs to the instruction group. A boolean false otherwise. Thrown if Diet Mode is enabled.

Determine if a Register Was Explicitly Read.

A register's name. A boolean true if the register was explicitly read by the instruction. A boolean false otherwise. Thrown if Diet Mode is enabled, or if the hardware architecture the instruction was disassembled for does not support the operation.

Determine if a Register Was Explicitly Read.

A register's unique identifier. A boolean true if the register was explicitly read by the instruction. A boolean false otherwise. Thrown if Diet Mode is enabled, or if the hardware architecture the instruction was disassembled for does not support the operation.

Determine if a Register Was Explicitly Written.

A register's name. A boolean true if the register was explicitly written by the instruction. A boolean false otherwise. Thrown if Diet Mode is enabled, or if the hardware architecture the instruction was disassembled for does not support the operation.

Determine if a Register Was Explicitly Written.

A register's unique identifier. A boolean true if the register was explicitly written by the instruction. A boolean false otherwise. Thrown if Diet Mode is enabled, or if the hardware architecture the instruction was disassembled for does not support the operation.

Determine if a Register Was Implicitly Read.

A register's name. A boolean true if the register was implicitly read by the instruction. A boolean false otherwise. Thrown if Diet Mode is enabled.

Determine if a Register Was Implicitly Read.

A register's unique identifier. A boolean true if the register was implicitly read by the instruction. A boolean false otherwise. Thrown if Diet Mode is enabled.

Determine if a Register Was Implicitly Written.

A register's name. A boolean true if the register was implicitly written by the instruction. A boolean false otherwise. Thrown if Diet Mode is enabled.

Determine if a Register Was Implicitly Written.

A register's unique identifier. A boolean true if the register was implicitly modified by the instruction. A boolean false otherwise. Thrown if Diet Mode is enabled.

Determine if a Register Was Explicitly or Implicitly Read.

Indicates if a register was read by the instruction, both explicitly and implicitly, if Diet Mode is disabled. If the hardware architecture the instruction was disassembled for does not support explicitly read registers, only the implicitly read registers are considered. To determine if Diet Mode is disabled, call . A register's name. A boolean true if the register was explicitly or implicitly read by the instruction. A boolean false otherwise. Thrown if Diet Mode is enabled.

Determine if a Register Was Explicitly or Implicitly Read.

Indicates if a register was read by the instruction, both explicitly and implicitly, if Diet Mode is disabled. If the hardware architecture the instruction was disassembled for does not support explicitly read registers, only the implicitly read registers are considered. To determine if Diet Mode is disabled, call . A register's unique identifier. A boolean true if the register was explicitly or implicitly read by the instruction. A boolean false otherwise. Thrown if Diet Mode is enabled.

Determine if a Register Was Explicitly or Implicitly Written.

Indicates if a register was written by the instruction, both explicitly and implicitly, if Diet Mode is disabled. If the hardware architecture the instruction was disassembled for does not support explicitly written registers, only the implicitly written registers are considered. To determine if Diet Mode is disabled, call . A register's name. A boolean true if the register was explicitly or implicitly written by the instruction. A boolean false otherwise. Thrown if Diet Mode is enabled.

Determine if a Register Was Explicitly or Implicitly Written.

Indicates if a register was written by the instruction, both explicitly and implicitly, if Diet Mode is disabled. If the hardware architecture the instruction was disassembled for does not support explicitly written registers, only the implicitly written registers are considered. To determine if Diet Mode is disabled, call . A register's unique identifier. A boolean true if the register was explicitly or implicitly modified by the instruction. A boolean false otherwise. Thrown if Diet Mode is enabled.

On Explicitly Read Registers Lazy Initialization.

The instruction's explicitly read registers.

On Explicitly Written Registers Lazy Initialization.

The instruction's explicitly written registers.

Disassembled Instruction Detail Builder.

The type of the instruction's details. The type of the hardware mode the instruction was disassembled for. The type of the instruction's architecture specific instruction groups. The type of the instruction's architecture specific instruction group unique identifiers. The type of the instruction. The type of the instruction's unique identifier. The type of the instruction's architecture specific registers. The type of the instruction's architecture specific register unique identifiers.

Get and Set All Read Registers.

Get and Set All Written Registers.

Get and Set Instruction's Disassemble Architecture.

Get and Set Instruction's Disassemble Mode.

Get and Set Instruction's Groups.

Get and Set Implicitly Read Registers.

Get and Set Implicitly Written Registers.

Build an Instruction Detail.

A disassembler. An instruction handle.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create an Instruction Group.

A disassembler. An instruction group's unique identifier. An instruction group.

Create a Register.

A disassembler. A register's unique identifier. A register.

Instruction Group.

The type of the instruction group's unique identifier.

Instruction Group's Name.

Get Instruction Group's Unique Identifier.

Determine if Diet Mode is Enabled.

Indicates if Diet Mode is enabled. A boolean true indicates it is enabled. A boolean false otherwise.

Get Instruction Group's Name.

Represents the instruction group's name if, and only if, Diet Mode is disabled. To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled.

Create an Instruction Group.

The instruction group's unique identifier. The instruction group's name.

Determine if This Object is Equal to Another Object.

An object to compare to. Should not be a null reference. A boolean true if this object is equal to the object. A boolean false otherwise.

Get Object's Hash Code.

The object's hash code.

Capstone M68K Disassembler.

Create a Capstone M68K Disassembler.

The hardware mode for the disassembler to use. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create an Instruction.

An instruction handle. An M68K instruction.

M68K Address Mode.

Indicates an invalid, or an uninitialized, address mode.

M68K Branch Displacement Operand Value.

Get Displacement Value.

Get Displacement Size.

Create an M68K Branch Displacement Operand Value.

A native M68K branch displacement operand value.

M68K Branch Displacement Size.

Indicates an invalid, or an uninitialized, branch displacement size.

Indicates a signed 8-bit branch displacement size.

Indicates a signed 16-bit branch displacement size.

Indicates a signed 32-bit branch displacement size.

M68K CPU Operation Size.

Indicates an invalid, or an uninitialized, CPU operation.

Indicates a signed 8-bit CPU operation.

Indicates a signed 16-bit CPU operation.

Indicates a signed 32-bit CPU operation.

M68K Disassemble Mode.

Indicates binary code should be disassembled in big-endian mode.

Indicates binary code should be disassembled with support for the M68K000 instruction set.

Indicates binary code should be disassembled with support for the M68K010 instruction set.

Indicates binary code should be disassembled with support for the M68K020 instruction set.

Indicates binary code should be disassembled with support for the M68K030 instruction set.

Indicates binary code should be disassembled with support for the M68K040 instruction set.

Indicates binary code should be disassembled with support for the M68K060 instruction set.

M68K FPU Operation Size.

Indicates an invalid, or an uninitialized, FPU operation.

Indicates a signed 4-byte FPU operation.

Indicates a signed 8-byte FPU operation.

Indicates a signed 12-byte FPU operation.

M68K Instruction.

Create an M68K Instruction.

A disassembler. An instruction handle. An M68K instruction.

Create an M68K Instruction.

A builder to initialize the object with.

M68K Instruction Builder.

Create an M68K Instruction.

An M68K instruction.

Create Instruction's Details.

A disassembler. An instruction handle. The instruction's details.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create Instruction's Unique Identifier.

An instruction's unique identifier. The instruction's unique identifier.

M68K Instruction Detail.

Get Instruction's Operands.

Get Operation Size.

Create an M68K Instruction Detail.

A disassembler. An instruction handle. An M68K instruction detail.

Create an M68K Instruction Detail.

A builder to initialize the object with.

M68K Instruction Detail Builder.

Get and Set Instruction's Operands.

Get and Set Operation Size.

Build an Instruction Detail.

A disassembler. An instruction handle.

Create an M68K Instruction Detail.

An M68K instruction detail.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create an Instruction Group.

A disassembler. An instruction group's unique identifier. An instruction group.

Create a Register.

A disassembler. A register's unique identifier. A register.

M68K Instruction Group.

Create an M68K Instruction Group.

A disassembler. The instruction group's unique identifier. An M68K instruction group.

Create an M68K Instruction Group.

The instruction group's unique identifier. The instruction group's name.

M68K Instruction Group Unique Identifier.

Indicates an invalid, or an uninitialized, instruction group.

M68K Instruction Unique Identifier.

Indicates an invalid, or an uninitialized, instruction.

M68K Memory Operand Value.

Get Base Register.

Get Bit Field.

Get Displacement.

Get Index Register.

Get Index Size.

Get Indirect Base Register.

Get Indirect Displacement.

Get Bit Field Offset.

Get Other Displacement.

Get Index Register's Scale.

Get Bit Field Width.

Create an M68K Memory Operand Value.

A disassembler. A native M68K memory operand value.

M68K Operand.

Branch Displacement Value.

Double Precision Immediate Value.

Immediate Value.

Memory Value.

Register Value.

Register Bits Value.

Register Pair Value.

Single Precision Immediate Value.

Address Mode.

Get Branch Displacement Value.

Represents the operand's branch displacement value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is to .

Get Double Precision Immediate Value.

Represents the operand's double precision immediate value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Immediate Value.

Represents the operand's immediate value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Memory Value.

Represents the operand's memory value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Register Value.

Represents the operand's register value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Register Bits Value.

Represents the operand's register bits value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Register Pair Value.

Represents a 2-tuple of the operand's register pair value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Single Precision Immediate Value.

Represents the operand's single precision immediate value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Operand's Type.

Represents the operand's type.

Create M68K Operands.

A disassembler. A native M68K instruction detail. An array of M68K operands.

Create an M68K Operand.

A disassembler. A native M68K operand.

M68K Operand Type.

Indicates an invalid, or an uninitialized, operand type.

Indicates a register operand.

Indicates an immediate operand.

Indicates a memory operand.

Indicates a single precision floating point operand.

Indicates a double precision floating point operand.

Indicates a register bits operand.

Indicates a register pair operand.

Indicates a branch displacement operand.

M68K Operation Size.

CPU Operation Size.

FPU Operation Size.

Get CPU Operation Size.

Represents the size of a CPU operation if, and only if, the operation size's type is . To determine the operation size's type, call . Thrown if the operation size's type is not .

Get FPU Operation Size.

Represents the size of a FPU operation if, and only if, the operation size's type is . To determine the operation size's type, call . Thrown if the operation size's type is not .

Get Operation Size's Type.

Represents the operation size's type.

Create an M68K Operation Size.

A native M68K operation size.

M68K Operation Size Type.

Indicates an invalid, or an uninitialized, operation size type.

Indicates a CPU operation size.

Indicates an FPU operation size.

M68K Register.

Create an M68K Register.

A disassembler. The register's unique identifier. An M68K register. A null reference if the register's unique identifier is equal to . Thrown if the disassembler is disposed.

Create a M68K Register.

The register's unique identifier. The register's name.

M68K Register Unique Identifier.

Indicates an invalid, or an uninitialized, register.

Native M68K Branch Displacement Operand Value.

Displacement Value.

Displacement Size.

Native M68K Instruction Detail.

Instruction's Operands.

Operation's Size.

Instruction's Operands' Count.

Native M68K Memory Operand Value.

Base Register.

Index Register.

Indirect Base Register.

Indirect Displacement.

Other Displacement.

Displacement.

Index Register's Scale.

Bit Field.

Bit Field Width.

Bit Field Offset.

Index Size.

Native M68K Operand.

Value.

Memory Value.

Branch Displacement Value.

Register Bits Value.

Operand's Type.

Address Mode.

Native M68K Operand Value.

Immediate Value.

Double Precision Immediate Value.

Single Precision Immediate Value.

Register Value.

Register Pair Value.

Native M68K Operation Size.

Operation Size's Type.

Operation's Value.

Native M68K Operation Size Value.

CPU Operation Size.

FPU Operation Size.

Native M68K Register Pair Operand Value.

First Register Value.

Second Register Value.

Marshal Extension.

Allocate Memory For a Structure.

The structure's type. A pointer to the allocated memory.

Allocate Memory For a Structure.

The collection's size. The structure's type. A pointer to the allocated memory.

Marshal a Pointer to a Structure and Free Memory.

The destination structure's type. The pointer to marshal. The destination structure.

Marshal a Pointer to a Structure.

The destination structure's type. The pointer to marshal. The destination structure.

Marshal a Pointer to a Collection of Structures.

The collection's type. A pointer to a collection. The pointer should be initialized to the collection's starting address. The collection's size. The destination collection.

Get a Type's Size.

The type. The type's size, in bytes.

Capstone MIPS Disassembler.

Create a Capstone MIPS Disassembler.

The hardware mode for the disassembler to use. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create an Instruction.

An instruction handle. A MIPS instruction.

MIPS Disassemble Mode.

Indicates binary code should be disassembled in big-endian mode.

Indicates binary code should be disassembled in 32-bit mode.

Indicates binary code should be disassembled in 64-bit mode.

Indicates binary code should be disassembled in little-endian mode.

Indicates binary code should be disassembled with support for the microMIPS instruction set.

Indicates binary code should be disassembled in MIPS2 mode.

Indicates binary code should be disassembled in MIPS3 mode.

Indicates binary code should be disassembled in MIPS32R6 mode.

MIPS Instruction.

Create a MIPS Instruction.

A disassembler. An instruction handle. A MIPS instruction.

Create a MIPS Instruction.

A builder to initialize the object with.

MIPS Instruction Builder.

Create a MIPS Instruction.

A MIPS instruction.

Create Instruction's Details.

A disassembler. An instruction handle. The instruction's details.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create Instruction's Unique Identifier.

An instruction's unique identifier. The instruction's unique identifier.

MIPS Instruction Detail.

Get Instruction's Operands.

Create a MIPS Instruction Detail.

A disassembler. An instruction handle. A MIPS instruction detail.

Create a MIPS Instruction Detail.

A builder to initialize the object with.

MIPS Instruction Detail Builder.

Get and Set Instruction's Operands.

Build an Instruction Detail.

A disassembler. An instruction handle.

Create a MIPS Instruction Detail.

A MIPS instruction detail.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create an Instruction Group.

A disassembler. An instruction group's unique identifier. An instruction group.

Create a Register.

A disassembler. A register's unique identifier. A register.

MIPS Instruction Group.

Create a MIPS Instruction Group.

A disassembler. The instruction group's unique identifier. A MIPS instruction group.

Create a MIPS Instruction Group.

The instruction group's unique identifier. The instruction group's name.

MIPS Instruction Group Unique Identifier.

Indicates an invalid, or an uninitialized, instruction group.

MIPS Instruction Unique Identifier.

Indicates an invalid, or an uninitialized, instruction.

MIPS Memory Operand Value.

Get Base Register.

Get Displacement.

Create a MIPS Memory Operand Value.

A disassembler. A native MIPS memory operand value.

MIPS Operand.

Immediate Value.

Memory Value.

Register Value.

Get Immediate Value.

Represents the operand's immediate value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Memory Value.

Represents the operand's memory value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Register Value.

Represents the operand's register value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Operand's Type.

Create MIPS Operands.

A disassembler. A native MIPS instruction detail. An array of MIPS operands.

Create a MIPS Operand.

A disassembler. A native MIPS operand.

MIPS Operand Type.

Indicates an invalid, or an uninitialized, operand type.

Indicates a register operand.

Indicates an immediate operand.

Indicates a memory operand.

MIPS Register.

Create a MIPS Register.

A disassembler. The register's unique identifier. A MIPS register. A null reference if the register's unique identifier is equal to . Thrown if the disassembler is disposed.

Create a MIPS Register.

The register's unique identifier. The register's name.

MIPS Register Unique Identifier.

Indicates an invalid, or an uninitialized, register.

Native MIPS Instruction Detail.

Instruction's Operands' Count.

Instruction's Operands.

Native MIPS Memory Operand Value.

Base Register.

Displacement.

Native Mips Operand.

Operand's Type.

Operand's Value.

Native MIPS Operand Value.

Register Value.

Immediate Value.

Memory Value.

Native Capstone.

Skip Data Callback Delegate.

A pointer to a buffer indicating the binary code that is being disassembled. A platform dependent integer indicating the size, in bytes, of the binary code buffer. A platform dependent integer indicating the 0-based offset of the encountered data in the binary code buffer. A pointer to an opaque data structure indicating custom state. A platform dependent integer indicating the number of bytes to skip, starting at the data offset, in the binary code buffer. A 0 indicates the disassemble operation should terminate immediately.

Magic Instruction Architecture Details Field Offset.

Represents the offset, in bytes, of NativeInstructionDetail.X86|Arm64|.... In the Capstone API, those fields are defined by a nested anonymous union defined by cs_detail. A poor-man's analysis of cs_detail has indicated that all fields defined by it are are accessible at this offset. It seems the .NET Marshaller marshals cs_detail to NativeInstructionDetail perfectly except for NativeInstructionDetail.X86|Arm64|...! Those fields are always set to garbage data, indicating the .NET Marshaller is marshaling them from incorrect memory locations. We've no idea why! As such, NativeInstructionDetail.X86|Arm64|... are not defined by the Capstone.NET API and are instead read manually from this offset.

Create a Native Capstone.

Create a Disassembler.

The hardware architecture for the disassembler to use. The hardware mode for the disassembler to use. A disassembler handle. Thrown if a disassembler could not be created. Thrown if the disassemble architecture is invalid, or if the disassemble mode is invalid or unsupported by the disassemble architecture. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create an Instruction..

A disassembler handle. An instruction handle. Thrown if the disassembler handle is disposed.

Get an Instruction's Accessed Registers.

A disassembler handle. An instruction handle. A 2-tuple, where the first item is an array of the instruction's read registers and the second item is an array of the instruction's written registers. Thrown if the instruction's accessed registers could not be retrieved. Thrown if the disassembler handle is invalid. Thrown if the instruction was disassembled when Instruction Details Mode was disabled, or if the instruction was disassembled when Skip Data Mode was enabled. Thrown if Diet Mode is enabled, or if the disassembler's hardware architecture does not support the operation. Thrown if the disassembler handle is disposed, or if the instruction handle is disposed.

Get an Instruction.

An instruction handle. An instruction.

Get an Instruction's Details.

An instruction handle. The instruction's details. A null reference indicates the instruction was disassembled without details.

Get an Instruction's Details.

The type of the instruction's details. An instruction handle. The instruction's details. A null reference indicates the instruction was disassembled without details.

Get an Instruction's Details.

An instruction. The instruction's details. A null reference indicates the instruction was disassembled without details.

Get an Instruction's Architecture Specific Details.

The type of the instruction's architecture specific details. An instruction. The instruction's architecture specific details. A null reference indicates the instruction was disassembled without its details.

Get an Instruction Group's Name.

A disassembler handle. An instruction group's unique identifier. The instruction group's name. A null reference if the disassembler handle is invalid, or if the instruction group's unique identifier is invalid. Thrown if the disassembler handle is disposed.

Get a Register's Name.

A disassembler handle. A register unique identifier. The register's name. A null reference if the disassembler handle is invalid, or if the register unique identifier is invalid. Thrown if the disassembler handle is disposed.

Get Capstone Library's Version.

The Capstone library's version.

Disassemble Binary Code Iteratively.

A disassembler handle. A buffer indicating the binary code to disassemble. The index of the instruction to disassemble in the binary code buffer . If the instruction is disassembled successfully, this value will be updated to reflect the index of the next instruction to disassemble in the binary code buffer. If the updated value is less than the length of the binary code buffer, you can safely invoke this method with the updated value to disassemble the next instruction. The address of the instruction. If the instruction is disassembled successfully, this value will be updated to reflect the address of the next instruction to disassemble in the binary code buffer. An instruction handle. A boolean true if an instruction was disassembled successfully. A boolean false otherwise. Thrown if the disassembler handle is disposed, or if the instruction handle is disposed.

Load Library.

Loads the Capstone library in the address space of the calling process if, and only if, the target .NET runtime this assembly is compiled for is .NET Framework 4.x. The .NET Framework runtime has support for .NET assemblies compiled for an "Any CPU" platform, as opposed to an explicit x64 or an x86 platform. When a process is executed, the .NET Framework runtime executes it as either an x64 or an x86 process, depending on the host's platform. This introduces an interesting challenge in that this assembly must either load either the x64 or x86 version of the Capstone library depending on the calling process' platform. Since the .NET Framework runtime supports only Windows, a Windows only API can be used to conditionally load either the x64 or x86 version of the Capstone library depending on the calling process' platform without sacrificing compatibility with other operating systems. To have any impact, this method must be called before any function exported by the Capstone library is called, ideally immediately when the calling process is first executed. The .NET Core runtime does not have support for .NET assemblies compiled for an "Any CPU" platform. When an assembly is deployed, it must explicitly specify either an x64 or x86 platform. As such, there is no need to conditionally load either the x64 or x86 version of the Capstone library since only the one that is compatible with the deployment platform will be supported.

Query an Option.

An option to query. A boolean true if the option is supported. A boolean false otherwise.

Set Disassemble Mode Option.

A disassembler handle. A hardware mode for the disassembler to use. Thrown if the disassemble mode option could not be set. Thrown if the disassemble mode is invalid. Thrown if the disassembler handle is disposed.

Set a Disassembler Option.

A disassembler handle. A type of option to set. A value to set the option to. Thrown if the option could not be set. Thrown if the disassembler handle is invalid, or if the option is invalid. Thrown if the option is equal to . Thrown if the disassembler handle is disposed.

Set Disassembler Instruction Mnemonic Option.

A disassembler handle. A value to set the instruction mnemonic option to. Thrown if the instruction mnemonic option could not be set. Thrown if the disassembler handle is invalid. Thrown if the disassembler handle is disposed.

Native Capstone Import.

Close a Disassembler

A pointer to a disassembler. A result code indicating the result of the operation.

Create a Disassembler.

The hardware architecture for the disassembler to use. The hardware mode for the disassembler to use. A pointer that will be updated to reference the disassembler. A result code indicating the result of the operation.

Create an Instruction..

A disassembler handle. A pointer to the instruction. Thrown if the disassembler handle is disposed.

Disassemble Binary Code.

A disassembler handle. A pointer to a buffer indicating the binary code to disassemble. A platform dependent integer indicating the size, in bytes, of the binary code buffer. The address of the first instruction in the binary code buffer. The maximum number of instructions in the binary code buffer to disassemble. A 0 indicates all instructions in the binary code buffer should be disassembled. A pointer that will be updated to reference the disassembled instructions. A platform dependent integer indicating the number of disassembled instructions if the binary code was disassembled successfully. An IntPtr.Zero otherwise. Thrown if the disassembler handle is disposed.

Free Memory Allocated For Disassembled Instructions.

A pointer to disassembled instructions. The number of disassembled instructions.

Get an Instruction's Accessed Registers.

A disassembler handle. An instruction handle. An array that will be updated to indicate the instruction's read registers. An 8-bit integer that will be updated to indicate the number of read registers. An array that will be updated to indicate the instruction's written registers. An 8-bit integer that will be updated to indicate the number of written registers. A result code indicating the result of the operation. Thrown if the disassembler handle is disposed, or if the instruction handle is disposed.

Get an Instruction Group's Name.

A disassembler handle. An instruction group's unique identifier. A pointer to an ASCII string indicating the instruction group's name. Thrown if the disassembler handle is disposed.

Get Last Error Code.

A disassembler handle. The error code of the last generated error. Thrown if the disassembler handle is disposed.

Get a Register's Name.

A disassembler handle. A register's unique identifier. A pointer to an ASCII string indicating the register's name. Thrown if the disassembler handle is disposed.

Get Capstone Library's Version.

A 32-bit integer that will be updated to indicate the Capstone library's major version. A 32-bit integer that will be updated to indicate the Capstone library's minor version. A 32-bit integer indicating the Capstone library's major and minor version.

Disassemble Binary Code Iteratively.

A disassembler handle. A pointer to a buffer indicating the binary code to disassemble. A platform dependent integer indicating the size, in bytes, of the binary code buffer. The address of the first instruction in the binary code buffer. An instruction handle. A boolean true if an instruction was disassembled successfully. A boolean false otherwise. Thrown if the disassembler handle is disposed, or if the instruction handle is disposed.

Load a Library.

The absolute file path of the library to load. A pointer to the loaded library. An IntPtr.Zero indicates the library was not loaded.

Query an Option.

An option to query. A boolean true if the option is supported. A boolean false otherwise.

Set a Disassembler Option.

A disassembler handle. A type of option to set. A platform dependent integer indicating the value to set the option to. A result code indicating the result of the operation. Thrown if the disassembler handle is disposed.

Native Capstone Result Code.

Indicates an operation completed successfully.

Indicates an operation failed because sufficient memory cannot be allocated to perform the operation.

Native Disassemble Mode.

Indicates binary code should be disassembled in little-endian mode.

Indicates binary code should be disassembled in 32-bit ARM mode.

Indicates binary code should be disassembled in 16-bit mode.

Indicates binary code should be disassembled in 32-bit mode.

Indicates binary code should be disassembled in 64-bit mode.

Indicates binary code should be disassembled with support for the ARM Thumb and ARM Thumb-2 instruction sets.

Indicates binary code should be disassembled with support for the ARM Cortex-M processor cores.

Indicates binary code should be disassembled with support for the ARMv8 instruction set.

Indicates binary code should be disassembled with support for the microMIPS instruction set.

Indicates binary code should be disassembled in MIPS3 mode.

Indicates binary code should be disassembled in MIPS32R6 mode.

Indicates binary code should be disassembled in MIPS2 mode.

Mips II ISA

Indicates binary code should be disassembled with support for the PowerPC Quad Processing Extensions instruction sets.

Indicates binary code should be disassembled with support for the M68K000 instruction set.

Indicates binary code should be disassembled with support for the M68K010 instruction set.

Indicates binary code should be disassembled with support for the M68K020 instruction set.

Indicates binary code should be disassembled with support for the M68K030 instruction set.

Indicates binary code should be disassembled with support for the M68K040 instruction set.

Indicates binary code should be disassembled with support for the M68K060 instruction set.

Indicates binary code should be disassembled in big-endian mode.

Native Disassembler Handle.

Create a Native Disassembler Handle.

A pointer to a disassembler.

Release Handle.

A boolean true if the handle was released. A boolean false otherwise.

Native Disassembler Option Type.

Indicates no option should be set.

Represents an option to set the syntax of the assembly code generated by a disassembler.

Represents an option to set whether a disassembler should generate details when disassembling instructions.

Represents an option to set a disassembler's disassemble mode.

Native Disassembler Option Value.

Indicates an option should be disabled.

Indicates an option should be enabled.

Indicates a disassembler should use its default syntax for generated assembly code.

Indicates a disassembler should use Intel syntax for generated assembly code.

Indicates a disassembler should use ATT syntax for generated assembly code.

Indicates a disassembler should use MASM syntax for generated assembly code.

Native Disassembled Instruction.

Instruction's Unique Identifier.

Instruction's Address (EIP).

Instruction's Size.

Instruction's Machine Bytes.

Instruction's Mnemonic.

Instruction's Operand Text.

Instruction's Details.

Represents a pointer to the instruction's details in unmanaged memory. A IntPtr.Zero indicates the instruction was disassembled without details.

Native Disassembled Instruction Details.

Implicitly Read Registers.

Implicitly Read Registers' Count.

Implicitly Written Registers.

Implicitly Written Registers' Count.

Instruction's Groups.

Instruction's Groups' Count.

Native Instruction Handle.

Create an Instruction Handle.

A pointer to an instruction.

Release Handle.

A boolean true if the handle was released. A boolean false otherwise.

Native Disassembled Instruction Mnemonic Option Value.

Instruction Unique Identifier.

Instruction Mnemonic.

Native Query Option.

Query ARM Architecture.

Query ARM64 Architecture.

Query MIPS Architecture.

Query X86 Architecture.

Query PowerPC Architecture.

Query Sparc Architecture.

Query SystemZ Architecture.

Query XCore Architecture.

Query 68K Architecture.

Query TMS320C64x Architecture.

Query 680X Architecture.

Query Ethereum EVM Architecture.

Query All Architectures.

Query Diet Mode.

Query X86 Reduce Mode.

Native Skip Data Option Value.

Instruction Mnemonic.

Operand Access Type.

Indicates an invalid, or an uninitialized, operand access type.

Capstone PowerPC Disassembler.

Create a Capstone PowerPC Disassembler.

The hardware mode for the disassembler to use. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create an Instruction.

An instruction handle. A PowerPC instruction.

Native PowerPC Condition Register Operand Value.

Scale.

Register.

Branch Code.

Native PowerPC Instruction Detail.

Branch Code.

Branch Hint.

Update CR0 Flag.

Instruction's Operands' Count.

Instruction's Operands.

Native PowerPC Memory Operand Value.

Base Register.

Displacement Value.

Native PowerPC Operand.

Operand's Type.

Operand's Value.

Native PowerPC Operand Value.

Register Value.

Immediate Value.

Memory Value.

Condition Register Value.

PowerPC Branch Code.

Indicates an invalid, or an uninitialized, branch code.

PowerPC Branch Hint.

Indicates an invalid, or an uninitialized, branch hint.

PowerPC Condition Register Operand Value.

Get Branch Code.

Get Register.

Get Scale.

Create a PowerPC Condition Register Operand Value.

A disassembler. A native PowerPC condition register operand value.

PowerPC Disassemble Mode.

Indicates binary code should be disassembled in big-endian mode.

Indicates binary code should be disassembled in 32-bit mode.

Indicates binary code should be disassembled in 64-bit mode.

Indicates binary code should be disassembled in little-endian mode.

Indicates binary code should be disassembled with support for the PowerPC Quad Processing Extensions instruction sets.

PowerPC Instruction.

Create a PowerPC Instruction.

A disassembler. An instruction handle. A PowerPC instruction.

Create a PowerPC Instruction.

A builder to initialize the object with.

PowerPC Instruction Builder.

Create a PowerPC Instruction.

A PowerPC instruction.

Create Instruction's Details.

A disassembler. An instruction handle. The instruction's details.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create Instruction's Unique Identifier.

An instruction's unique identifier. The instruction's unique identifier.

PowerPC Instruction Detail.

Get Branch Code.

Get Hint.

Get Instruction's Operands.

Get Update CR0 Flag.

Create a PowerPC Instruction Detail.

A disassembler. An instruction handle. A PowerPC instruction detail.

Create a PowerPC Instruction Detail.

A builder to initialize the object with.

PowerPC Instruction Detail Builder.

Get and Set Branch Code.

Get and Set Branch Hint.

Get and Set Instruction's Operands.

Get and Set Update CR0 Flag.

Build an Instruction Detail.

A disassembler. An instruction handle.

Create a PowerPC Instruction Detail.

A PowerPC instruction detail.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create an Instruction Group.

A disassembler. An instruction group's unique identifier. A PowerPC instruction group.

Create a Register.

A disassembler. A register's unique identifier. A PowerPC register.

PowerPC Instruction Group.

Create a PowerPC Instruction Group.

A disassembler. The instruction group's unique identifier. A PowerPC instruction group.

Create a PowerPC Instruction Group.

The instruction group's unique identifier. The instruction group's name.

PowerPC Instruction Group Unique Identifier.

Indicates an invalid, or an uninitialized, instruction group.

PowerPC Instruction Unique Identifier.

Indicates an invalid, or an uninitialized, instruction.

PowerPC Memory Operand Value.

Get Base Register.

Get Displacement Value.

Create a PowerPC Memory Operand Value.

A disassembler. A native PowerPC memory operand value.

PowerPC Operand.

Condition Register Value.

Immediate Value.

Memory Value.

Register Value.

Get Condition Register Value.

Represents the operand's condition register value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Immediate Value.

Represents the operand's immediate value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Memory Value.

Represents the operand's memory value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Register Value.

Represents the operand's register value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Operand's Type.

Create PowerPC Operands.

A disassembler. A native PowerPC instruction detail. An array of PowerPC operands.

Create a PowerPC Operand.

A disassembler. A native PowerPC operand.

PowerPC Operand Type.

Indicates an invalid, or an uninitialized, operand type.

Indicates a register operand.

Indicates an immediate operand.

Indicates a memory operand.

Indicates a condition register operand.

PowerPC Register.

Create a PowerPC Register.

A disassembler. The register's unique identifier. A PowerPC register. A null reference if the register's unique identifier is equal to . Thrown if the disassembler is disposed.

Create a PowerPC Register.

The register's unique identifier. The register's name.

PowerPC Register Unique Identifier.

Indicates an invalid, or an uninitialized, register.

Register.

The type of the register's unique identifier.

Register's Name.

Get Register's Unique Identifier.

Determine if Diet Mode is Enabled.

Indicates if Diet Mode is enabled. A boolean true indicates it is enabled. A boolean false otherwise.

Get Register's Name.

Represents the register's name if, and only if, Diet Mode is disabled. To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled.

Create a Register.

The register's unique identifier. The register's name.

Determine if This Object is Equal to Another Object.

An object to compare to. Should not be a null reference. A boolean true if this object is equal to the object. A boolean false otherwise.

Get Object's Hash Code.

The object's hash code.

Safe Handle Extension.

Add a Reference to and Get a Handle.

Convenient method to add a reference to a handle before retrieving its wrapped pointer. If a reference cannot be added to the handle, an exception is thrown. This follows Microsoft's recommended best practice to add a reference to the handle before retrieving its wrapped pointer to minimize the risk of handle recycle attacks. You, however, are responsible for releasing the reference to the handle after you are done with it, using SafeHandle.DangerousRelease(), otherwise you risk a memory leak. This method is the equivalent to calling both SafeHandle.DangerousAddRef() and SafeHandle.DangerousGetHandle(), except an exception is thrown if the operation fails. This is for convenience if, and only if, you want to treat the failure of this operation as exceptional! If you do not want to treat the failure of this operation as exceptional and you instead have a non-exceptional back-off routine, do not call this method and perform your back-off routine in an exception handler! You're better off simply calling both SafeHandle.DangerousAddRef() and SafeHandle.DangerousGetHandle() yourself. A handle. The handle's wrapped pointer. Thrown if the handle is closed, or if the handle is invalid. Thrown if the handle is a null reference. Thrown if a reference to the handle could not be added.

Capstone X86 Disassembler.

Determine if Reduce Mode is Enabled.

Indicates if Reduce Mode is enabled. A boolean true indicates it is enabled. A boolean false otherwise.

Create a Capstone X86 Disassembler.

The hardware mode for the disassembler to use. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create an Instruction.

An instruction handle. An X86 instruction.

Native X86 Encoding.

ModR/M Offset.

Displacement Offset.

Displacement Size.

Immediate Offset.

Immediate Size.

Native X86 Flag.

EFLAGS.

FPU Flags.

Native X86 Instruction Detail.

Instruction's Prefix.

Instruction's Opcode.

REX Prefix.

Address Size.

ModR/M.

SIB Value.

Displacement Value.

SIB Index.

SIB Scale.

SIB Base.

XOP Condition Code.

SSE Condition Code.

AVX Condition Code.

AVX Suppress All Exceptions Flag.

AVX Rounding Mode.

Flag.

Instruction's Operands' Count.

Instruction's Operands.

Encoding.

Native X86 Memory Operand Value.

Segment Register.

Base Register.

Index Register.

Index Register's Scale.

Displacement Value.

Native X86 Operand.

Operand's Type.

Operand's Value.

Operand's Size.

Operand's Access Type.

AVX Broadcast.

AVX Zero Opmask.

Native X86 Operand Value.

Register Value.

Immediate Value.

Memory Value.

X86 AVX Broadcast.

Indicates an invalid, or an uninitialized, AVX broadcast.

X86 AVX Condition Code.

Indicates an invalid, or an uninitialized, AVX condition code.

X86 AVX Rounding Mode.

Indicates an invalid, or an uninitialized, AVX rounding mode.

X86 Disassemble Mode.

Indicates binary code should be disassembled in 16-bit mode.

Indicates binary code should be disassembled in 32-bit mode.

Indicates binary code should be disassembled in 64-bit mode.

Indicates binary code should be disassembled in little-endian mode.

X86 Encoding.

Get Displacement Offset.

Get Displacement Size.

Get Immediate Offset.

Get Immediate Size.

Get ModR/M Offset.

Create an X86 Encoding.

A native X86 encoding.

X86 Instruction.

Create an X86 Instruction.

A disassembler. An instruction handle. An X86 instruction.

Create an X86 Instruction.

A builder to initialize the object with.

X86 Instruction Builder.

Create an X86 Instruction.

An X86 instruction.

Create Instruction's Details.

A disassembler. An instruction handle. The instruction's details.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create Instruction's Unique Identifier.

An instruction's unique identifier. The instruction's unique identifier.

X86 Instruction Detail.

Get Address Size.

Get AVX Condition Code.

Get AVX Rounding Mode.

Get AVX Suppress All Exceptions Flag.

Get Displacement Value.

Get EFlags.

Get Encoding.

Get FPU Flags.

Get ModR/M.

Get Instruction's Opcode.

Get Instruction's Operands.

Get Instruction's Prefix.

Get REX Prefix.

Get SIB Value.

Get SIB Base.

Get SIB Index.

Get SIB Scale.

Get SSE Condition Code.

Get XOP Condition Code.

Create an X86 Instruction Detail.

A disassembler. An instruction handle. An X86 instruction detail.

Create an X86 Instruction Detail.

A builder to initialize the object with.

X86 Instruction Detail Builder.

Get and Set Address Size.

Get and Set AVX Condition Code.

Get and Set AVX Rounding Mode.

Get and Set AVX Suppress All Exceptions Flag.

Get and Set Displacement Value.

Get and Set EFlags.

Get and Set Encoding.

Get and Set FPU Flags.

Get and Set ModR/M.

Get and Set Instruction's Opcode.

Get and Set Instruction's Operands.

Get and Set Instruction's Prefix.

Get and Set REX Prefix.

Get and Set SIB Value.

Get and Set SIB Base.

Get and Set SIB Index.

Get and Set SIB Scale.

Get and Set SSE Condition Code.

Get and Set XOP Condition Code.

Build an Instruction Detail.

A disassembler. An instruction handle.

Create an X86 Instruction Detail.

An X86 instruction detail.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create an Instruction Group.

A disassembler. An instruction group's unique identifier. An X86 instruction group.

Create a Register.

A disassembler. A register's unique identifier. An X86 register.

X86 Instruction Group.

Create an X86 Instruction Group.

A disassembler. The instruction group's unique identifier. An X86 instruction group.

Create an X86 Instruction Group.

X86 Instruction Group Unique Identifier.

Indicates an invalid, or an uninitialized, instruction group.

X86 Instruction Unique Identifier.

Indicates an invalid, or an uninitialized, instruction.

X86 Memory Operand Value.

Get Base Register.

Get Displacement Value.

Get Index Register.

Get Index Register's Scale.

Get Segment Register.

Create an X86 Memory Operand Value.

A disassembler. A native X86 memory operand value.

X86 Operand.

Operand's Access Type.

Immediate Value.

Memory Value.

Register Value.

Get Operand's Access Type.

Represents the operand's access type if, and only if, Diet Mode is disabled. To determine if Diet Mode is disabled, call . Thrown if Diet Mode is enabled.

Get AVX Broadcast.

Get AVX Zero Opmask.

Get Immediate Value.

Represents the operand's immediate value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Determine if Diet Mode is Enabled.

Indicates if Diet Mode is enabled. A boolean true indicates it is enabled. A boolean false otherwise.

Get Memory Value.

Represents the operand's memory value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Register Value.

Represents the operand's register value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Operand's Size.

Get Operand's Type.

Create X86 Operands.

A disassembler. A native X86 instruction detail. An array of X86 operands.

Create an X86 Operand.

A disassembler. A native X86 operand.

X86 Operand Type.

Indicates an invalid, or an uninitialized, operand type.

Indicates a register operand.

Indicates an immediate operand.

Indicates a memory operand.

X86 Prefix.

Indicates an invalid, or an uninitialized, prefix.

X86 Register.

Create an X86 Register.

A disassembler. The register's unique identifier. An X86 register. A null reference if the register's unique identifier is equal to . Thrown if the disassembler is disposed.

Create an X86 Register.

The register's unique identifier. The register's name.

X86 Register Unique Identifier.

Indicates an invalid, or an uninitialized, register.

X86 SSE Condition Code.

Indicates an invalid, or an uninitialized, SSE condition code.

X86 XOP Condition Code.

Indicates an invalid, or an uninitialized, XOP condition code.

Capstone XCore Disassembler.

Create a Capstone XCore Disassembler.

The hardware mode for the disassembler to use. Thrown if a disassembler could not be created. Thrown if sufficient memory cannot be allocated to perform the operation as a rare indication that the system is under heavy load.

Create an Instruction.

An instruction handle. An XCore instruction.

Native XCore Instruction Detail.

Instruction's Operands' Count.

Instruction's Operands.

Native XCore Memory Operand Value.

Base Register.

Index Register.

Displacement Value.

Direct Value.

Native XCore Operand.

Operand's Type.

Operand's Value.

Native XCore Operand Value.

Register Value.

Immediate Value.

Memory Value.

XCore Disassemble Mode.

Indicates binary code should be disassembled in big-endian mode.

XCore Instruction.

Create an XCore Instruction.

A disassembler. An instruction handle. An XCore instruction.

Create an XCore Instruction.

A builder to initialize the object with.

XCore Instruction Builder.

Create an XCore Instruction.

An XCore instruction.

Create Instruction's Details.

A disassembler. An instruction handle. The instruction's details.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create Instruction's Unique Identifier.

An instruction's unique identifier. The instruction's unique identifier.

XCore Instruction Detail.

Get Instruction's Operands.

Create an XCore Instruction Detail.

A disassembler. An instruction handle. An XCore instruction detail.

Create an XCore Instruction Detail.

A builder to initialize the object with.

XCore Instruction Detail Builder.

Get and Set Instruction's Operands.

Build an Instruction Detail.

A disassembler. An instruction handle.

Create an XCore Instruction Detail.

An XCore instruction detail.

Create Disassemble Mode.

A native disassemble mode. A disassemble mode.

Create an Instruction Group.

A disassembler. An instruction group's unique identifier. An instruction group.

Create a Register.

A disassembler. A register's unique identifier. A register.

XCore Instruction Group.

Create an XCore Instruction Group.

A disassembler. The instruction group's unique identifier. An XCore instruction group.

Create an XCore Instruction Group.

The instruction group's unique identifier. The instruction group's name.

XCore Instruction Group Unique Identifier.

Indicates an invalid, or an uninitialized, instruction group.

XCore Instruction Unique Identifier.

Indicates an invalid, or an uninitialized, instruction.

XCore Memory Operand Value.

Get Base Register.

Get Direct Value.

Get Displacement Value.

Get Index Register.

Create an XCore Memory Operand Value.

A disassembler. A native XCore memory operand value.

XCore Operand.

Immediate Value.

Memory Value.

Register Value.

Get Immediate Value.

Represents the operand's immediate value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Memory Value.

Represents the operand's memory value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Register Value.

Represents the operand's register value if, and only if, the operand's type is . To determine the operand's type, call . Thrown if the operand's type is not .

Get Operand's Type.

Create XCore Operands.

A disassembler. A native XCore instruction detail. An array of XCore operands.

Create an XCore Operand.

A disassembler. A native XCore operand.

XCore Operand Type.

Indicates an invalid, or an uninitialized, operand type.

Indicates a register operand.

Indicates an immediate operand.

Indicates a memory operand.

XCore Register.

Create an XCore Register.

A disassembler. The register's unique identifier. An XCore register. A null reference if the register's unique identifier is equal to . Thrown if the disassembler is disposed.

Create a XCore Register.

The register's unique identifier. The register's name.

XCore Register Unique Identifier.

Indicates an invalid, or an uninitialized, register.